def model PASMC_test as def import using "../cellLib/Components/units.cellml" for unit mM using unit mM; unit mV using unit mV; unit uM using unit uM; enddef; def import using "../Components/PASMC.cellml" for comp PASMC using comp PASMC; enddef; def import using "../Components/Para.cellml" for comp Para using comp Para; enddef; def import using "../cellLib/Protocols/X_clamp_protocol.cellml" for comp X_clamp_protocol using comp X_clamp_protocol; enddef; def import using "../cellLib/Components/time.cellml" for comp time using comp time_s; enddef; def comp output as var v_i: mV {pub: in}; var s_i: uM {pub: in}; var c_i: uM {pub: in}; var K_out: mM {pub: in}; var t: second {pub: in}; enddef; def comp clamp_para as var t_ss: second {init: 10, pub: out}; var X_Holding: mM {init: 4.7, pub: out}; var t_act: second {init: 70, pub: out}; var X_Test: mM {init: 80, pub: out}; enddef; def map between Para and PASMC for vars B and B; vars C and C; vars C_NKA and C_NKA; vars D and D; vars G_Ca and G_Ca; vars G_Cl and G_Cl; vars G_Ki and G_Ki; vars G_NCX and G_NCX; vars K_mK and K_mK; vars L and L; vars R_Ca and R_Ca; vars R_K and R_K; vars R_d and R_d; vars beta and beta; vars c_NCX and c_NCX; vars c_b and c_b; vars c_c and c_c; vars c_w and c_w; vars ci_init and ci_init; vars gamma and gamma; vars lambda and lambda; vars s_c and s_c; vars si_init and si_init; vars v_Ca1 and v_Ca1; vars v_Ca2 and v_Ca2; vars v_Ca3 and v_Ca3; vars v_Cl and v_Cl; vars v_K and v_K; vars v_NCX and v_NCX; vars v_d and v_d; vars vi_init and vi_init; vars wi_init and wi_init; enddef; def map between X_clamp_protocol and PASMC for vars X and K_out; enddef; def map between PASMC and output for vars c_i and c_i; vars s_i and s_i; vars v_i and v_i; enddef; def map between time and PASMC for vars time and t; enddef; def map between X_clamp_protocol and time for vars time and time; enddef; def map between time and output for vars time and t; enddef; def map between clamp_para and X_clamp_protocol for vars X_Holding and X_Holding; vars X_Test and X_Test; vars t_act and t_act; vars t_ss and t_ss; enddef; def map between X_clamp_protocol and output for vars X and K_out; enddef; enddef;